A majority logic circuit indicates whether a majority of binary inputs are equal to one. Prior art techniques accomplish this by either counting the number of inputs, or by using Boolean logic. Typically, an odd number of inputs are used to eliminate the possibility of having an equal number of ones and zeros.
U.S. Pat. No. 4,091,293, entitled “MAJORITY DECISION LOGIC CIRCUIT,” discloses a method of detecting buffer overflow exploits by searching for pointer fingerprints. A pointer fingerprint is a portion of a pointer containing at least a portion of the return address. Preferably, the method searches for the return address of a jump function only in portions of the stack where jump functions are not expected. This method requires extensive use of processor resources and requires a determination of which return addresses are valid and which are invalid. U.S. Pat. No. 4,091,293 is hereby incorporated by reference into the specification of the present invention.
U.S. Pat. No. 4,692,640, entitled “MAJORITY CIRCUIT COMPRISING BINARY COUNTER,” discloses a circuit comprising a series of binary counters. Each counter is initially set to zero, with data entered serially over multiple clock cycles. If the input data is a one, the binary counter is incremented. After all data has been entered, if the output is greater than the number of inputs divided by two, the circuit indicates that the majority of the inputs were a one. The time to determine the output increases with each additional input. The present invention is not limited in this regard. U.S. Pat. No. 4,692,640 is hereby incorporated by reference into the specification of the present invention.
U.S. Pat. No. 5,680,408, entitled “METHOD AND APPARATUS FOR DETERMINING A VALUE OF A MAJORITY OF OPERANDS,” discloses a circuit that can determine the output in a short number of clock cycles. Multiple operands are received, and only the minimum number of inputs is tested to insure that the majority of the inputs are equal to one. The invention works well for small number of inputs, but does not scale well for large numbers of inputs, and becomes very complex. The present invention is not limited in this regard. U.S. Pat. No. 5,680,408 is hereby incorporated by reference into the specification of the present invention.